When a liquid display panel displays images, each frame switching is implemented by scanning of scanning lines.
Scanning lines are made of metal materials, which have resistance. As a transmission distance increases, a voltage on a scanning line will decrease, and such phenomenon is referred to as a voltage drop. As shown in FIG. 1, the voltage drop goes from low to high as distances from pixel A, pixel B, and pixel C to an input end of a gate scanning signal get larger.
Specifically, a gate line voltage drop in the existing liquid crystal display panel is expressed as:
      Δ    ⁢                  ⁢    Vp    =                    C        gs                              C          gs                +                  C          lc                +                  C          s                      *          V      ghl      wherein, ΔVp denotes a voltage drop value; Cgs denotes a capacitance between a gate line and a source/drain of a switching element; Clc denotes a liquid crystal capacitance; Cs denotes a storage capacitance; and Vghl denotes a difference between an ideal input voltage and an actual input voltage. Along a direction from an output proximal end to an output distal end of the gate line (i.e., a direction of the gate line away from a scanning signal drive circuit), the actual input voltage on the gate line is gradually reduced and the ideal input voltage does not change, so that Vghl gradually increases.
FIG. 2 schematically shows a voltage drop across pixel A, pixel B and pixel C respectively. The voltage drop goes from low to high as distances from pixel A, pixel B, and pixel C to the input end of the gate scanning signal get larger, i.e., Va<Vb<Va denotes the voltage drop across pixel A, and ΔVa denotes a feedthrough voltage on pixel A. Vb denotes the voltage drop across pixel B, and ΔVb denotes a feedthrough voltage on pixel B. Vc denotes the voltage drop across pixel C, ΔVc denotes a feedthrough voltage on pixel C, and Vgh denotes an ideal input voltage on the gate line. It can been seen from the aforesaid expression that ΔVp may cause an image to be relatively bright near the input end of the gate line and relatively dark away from the input end of the gate line, thereby affecting brightness uniformity of the display panel.